Exceljuta Talent Solution Pvt. Ltd.
Bengaluru, Karnataka, India
Posted 6 years, 5 months, 7 days ago
JD:
FPGA Design / Lead
JD : Coding : C, VHDL, Verilog / RTL Coding, Timing Synthesis, HIL Simulation
Tools : Xilinx Vivado Tools for Kintex / Artix Family, Matlab System Generator Expertise is Must
I/O Interfaces : JESD, AIC Related Antenna Interfaces expertise in LTE,
Designs : Experience in LTE / Any broad band development expertise, Multi-Clock domain development, Optimization and debugging expertise.
Technologies Expertise : LTE, Mixers / PLL / DPLL, ADC / DAC Interconnect, High Speed Inter-Processor Interconnect Expertise
BOLD letter are mandatory.
Exp - 6 to 12 Years.
Location - Bangalore ( Product client)
Payroll - T&VS (Test and verification) - Deputation to Client.